Conference Sponsors

ISMVL 2009
39th International Symposium on Multiple-Valued Logic
May 21-23, 2009

18th International Workshop on Post-Binary ULSI Systems
May 20, 2009

Reed-Muller 2009
May 23-24, 2009

Naha, Okinawa, Japan

okinawa

  • Latest News 
    • ISMVL2009 Photos .(May 26, 2009)
    • Tour & Banquet Information [pdf].(May 12, 2009)
    • Final Program-UPDATED [pdf].(May 12, 2009)
    • Speaker's information guide [pdf].(May 7, 2009)
    • Useful slips for foreigner [doc / pdf].(May 7, 2009)
    • IEICE Special Section on MVL and VLSI Computing (Apr 30, 2009)
    • ULSIWS Program [Tentative].(Apr 14, 2009)
    • RM2009 Program [Tentative].(Apr 14, 2009)
    • Symposium Program [Final].(Apr 12, 2009)
    • Access map.(Mar 3, 2009)
    • Accomodation Information.(Feb 25, 2009)
    • Venue Information.(Feb 23, 2009)
    • Registration information [Advance registration deadline is April 20, 2009].(Feb 19, 2009)
    • Submission is closed.(Dec. 1, 2008)
    • ULSIWS link (Oct. 21, 2008)
    • Special Sessions (Oct. 3, 2008)
    • Tourist Information (Sep. 24, 2008)
    • Paper submission page
    • Call for Papers (pdf)
    • Call for Sessions (pdf)
  • Call for papers (pdf)

    You are invited to submit an original paper, survey or tutorial paper on any subject in the area of multiple-valued logic, including but not limited to:

    Algebra and Formal Aspects Logic Design and Switching Theory
    Automatic Reasoning Test and Verification
    Logic Programming Spectral Techniques
    Philosophical Aspects Circuit/Device Implementation
    Fuzzy Logic and Soft Computing VLSI Architecture
    Data Mining VLSI Computing
    Machine Learning and Robotics System-on-Chip Technology
    Quantum Computing Nano Technology

    Special Sessions link.

    Paper submissions will be accomplished electronically using an automated submission system. All papers will undergo a review process and accepted papers will appear in IEEE-CS sponsored proceedings in electronic format. CD proceedings will be distributed to symposium registrants and the proceedings will also appear in the IEEE Xplore archive. Each manuscript should include a 50-100 word abstract and should not exceed 6 pages in the 2-column proceedings format.

  • Paper submission page
    • (New!) Extra Page fee : If your paper is more than 6 pages (maximum is 8 pages), there is 11,000 Yen extra page fee per page. (Feb 23, 2009)
    • Forms "Subject areas" and "Type of session" are added. (Oct. 14, 2008)
    • Submission deadline is extended to "November 17, 2008". (Oct. 28, 2008)
    • Submission deadline is extended again to "December 1, 2008". (Nov. 17, 2008)

  • Call for Sessions(pdf)
  • Important Dates
    Paper Submission Deadline: Closed
    Notification of Acceptance: Closed (February 1, 2009)
    Delivery of Camera-Ready Papers: Closed (March 1, 2009)
    Advance registration deadline: April 20, 2009
    ISMVL2009 Conference: May 21-23, 2009
    Post Binary ULSI Workshop: May 20, 2009
    Reed-Muller Workshop : May 23-24, 2009


Last modified by Y. Yuminaka, Monday, September 14, 2009 2:36 pm

Institute of Electrical and Electronics Engineers
Institute of Electrical and Electronics
Engineers
IEEE Computer Society
IEEE Computer Society

mvltc
TC on Multiple-Valued Logic

Japan MVL research group
Japan MVL research Group
Graduate School of Information Sciences of Tohoku University
Graduate School of Information Sciences of Tohoku University

Conference Co-sponsor

Center of Education and Research for Information Electronics Systems of Tohoku University
Center of Education and Research for Information Electronics Systems of Tohoku University

Cooperation

CAS Fukuoka Chapter
CAS Fukuoka Chapter